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1

50 Years of FFT Algorithms and Applications

Kumar, G. Ganesh, Sahoo, Subhendu K., Meher, Pramod Kumar

Journal:

Circuits, Systems, and Signal Processing

Year:

2019

Language:

english

File:

PDF, 1.12 MB

english, 2019

2

New Approach to Look-Up-Table Design and Memory-Based Realization of FIR Digital Filter

Meher, Pramod Kumar

Journal:

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications

Year:

2010

Language:

english

File:

PDF, 1.30 MB

english, 2010

3

FPGA Implementation of Orthogonal Matching Pursuit for Compressive Sensing Reconstruction

Rabah, Hassan, Amira, Abbes, Mohanty, Basant Kumar, Almaadeed, Somaya, Meher, Pramod Kumar

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 2.32 MB

english, 2014

4

[IEEE 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Sapporo, Japan (2019.5.26-2019.5.29)] 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Low-Complexity Systolic Multiplier for GF(2 m ) using Toeplitz Matrix-Vector Product Method

Xie, Jiafeng, Lee, Chiou-Yng, Meher, Pramod Kumar

Year:

2019

Language:

english

File:

PDF, 420 KB

english, 2019

5

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Reconfigurable CORDIC architectures for multi-mode and multi-trajectory operations

Aggarwal, Supriya, Meher, Pramod K.

Year:

2014

Language:

english

File:

PDF, 484 KB

english, 2014

6

[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - New approach to LUT implementation and accumulation for memory-based multiplication

Meher, Pramod Kumar

Year:

2009

Language:

english

File:

PDF, 702 KB

english, 2009

7

Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data

Meher, Pramod Kumar, Mohanty, Basant Kumar, Patel, Sujit Kumar, Ganguly, Soumya, Srikanthan, Thambipillai

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2015

Language:

english

File:

PDF, 3.45 MB

english, 2015

8

Efficient Shift-Add Implementation of FIR Filters Using Variable Partition Hybrid Form Structures

Ray, Dwaipayan, George, Nithin V., Meher, Pramod Kumar

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2018

Language:

english

File:

PDF, 2.68 MB

english, 2018

9

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - A high-speed FIR adaptive filter architecture using a modified delayed LMS algorithm

Meher, Pramod K., Maheshwari, Megha

Year:

2011

Language:

english

File:

PDF, 356 KB

english, 2011

10

[IEEE 2013 IEEE International Symposium on Circuits and Systems (ISCAS) - Beijing (2013.5.19-2013.5.23)] 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) - Flexible integer DCT architectures for HEVC

Sang Yoon Park,, Meher, Pramod Kumar

Year:

2013

Language:

english

File:

PDF, 1.02 MB

english, 2013

11

Low-Complexity Multiplier for $GF(2^{m})$ Based on All-One Polynomials

Xie, Jiafeng, Meher, Pramod Kumar, He, Jianjun

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 310 KB

english, 2013

12

Efficient Integer DCT Architectures for HEVC

Meher, Pramod Kumar, Park, Sang Yoon, Mohanty, Basant Kumar, Lim, Khoon Seong, Yeo, Chuohao

Journal:

IEEE Transactions on Circuits and Systems for Video Technology

Year:

2014

Language:

english

File:

PDF, 1.98 MB

english, 2014

13

Critical-Path Analysis and Low-Complexity Implementation of the LMS Adaptive Algorithm

Meher, Pramod Kumar, Park, Sang Yoon

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2014

Language:

english

File:

PDF, 1.78 MB

english, 2014

14

Bit-Level Optimization of Adder-Trees for Multiple Constant Multiplications for Efficient FIR Filter Implementation

Pan, Yu, Meher, Pramod Kumar

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2014

Language:

english

File:

PDF, 1.35 MB

english, 2014

15

Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay

Meher, Pramod Kumar, Park, Sang Yoon

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 1.00 MB

english, 2014

16

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - High-speed multiplier block design based on bit-level critical path optimization

Lou, Xin, Yu, Ya Jun, Meher, Pramod Kumar

Year:

2014

Language:

english

File:

PDF, 380 KB

english, 2014

17

Hardware-Efficient Realization of Prime-Length DCT Based on Distributed Arithmetic

Xie, Jiafeng, Meher, Pramod Kumar, He, Jianjun

Journal:

IEEE Transactions on Computers

Year:

2013

Language:

english

File:

PDF, 730 KB

english, 2013

18

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - Efficient coefficient partitioning for decomposed DA-based inner-product computation

Pan, Yu, Meher, Pramod Kumar

Year:

2011

Language:

english

File:

PDF, 393 KB

english, 2011

19

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - A novel DA-based architecture for efficient computation of inner-product of variable vectors

Meher, Pramod Kumar, Park, Sang Yoon

Year:

2014

Language:

english

File:

PDF, 648 KB

english, 2014

20

[IEEE 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008 - Seattle, WA, USA (2008.05.18-2008.05.21)] 2008 IEEE International Symposium on Circuits and Systems - Discrete tchebichef transform-A fast 4x4 algorithm and its application in image/video compression

Ishwar, Sujata, Meher, Pramod Kumar, Swamy, M.N.S.

Year:

2008

Language:

english

File:

PDF, 1.88 MB

english, 2008

21

[IEEE 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012 - Seoul, Korea (South) (2012.05.20-2012.05.23)] 2012 IEEE International Symposium on Circuits and Systems - Efficient architectures for VLSI implementation of 2-D discrete Hadamard transform

Mohanty, Basant Kumar, Meher, Pramod Kumar, Singhal, Subodh Kumar

Year:

2012

Language:

english

File:

PDF, 541 KB

english, 2012

22

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits

Meher, Pramod K., Mohanty, Basant K., Srikanthan, Thambipillai

Year:

2014

Language:

english

File:

PDF, 365 KB

english, 2014

23

[IEEE 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012 - Seoul, Korea (South) (2012.05.20-2012.05.23)] 2012 IEEE International Symposium on Circuits and Systems - Low-latency area-delay-efficient systolic multiplier over GF(2m) for a wider class of trinomials using parallel register sharing

Xie, Jiafeng, Meher, Pramod Kumar, He, Jianjun

Year:

2012

Language:

english

File:

PDF, 699 KB

english, 2012

24

[IEEE 2008 3rd IEEE Conference on Industrial Electronics and Applications (ICIEA) - Singapore (2008.06.3-2008.06.5)] 2008 3rd IEEE Conference on Industrial Electronics and Applications - Systolic array realization of a neural network-based face recognition system

Sudha, N., Mohan, A., Meher, Pramod K.

Year:

2008

Language:

english

File:

PDF, 542 KB

english, 2008

25

Subquadratic Space-Complexity Digit-Serial Multipliers Over $GF(2^{m})$ Using Generalized $(a,b)$-Way Karatsuba Algorithm

Lee, Chiou-Yng, Meher, Pramod Kumar

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2015

Language:

english

File:

PDF, 2.11 MB

english, 2015

26

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Fine-grained pipelining for multiple constant multiplications

Lou, Xin, Meher, Pramod Kumar, Yu, Ya Jun

Year:

2015

Language:

english

File:

PDF, 532 KB

english, 2015

27

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Critical-path optimization for efficient hardware realization of lifting and flipping DWTs

Mohanty, Basant K., Meher, Pramod K., Srikanthan, Thambipillai

Year:

2015

Language:

english

File:

PDF, 719 KB

english, 2015

28

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Efficient subquadratic parallel multiplier based on modified SPB of GF(2m)

Pan, Jeng-Shyang, Meher, Pramod Kumar, Lee, Chiou-Yng, Bai, Hong-Hai

Year:

2015

Language:

english

File:

PDF, 335 KB

english, 2015

29

Lower Bound Analysis and Perturbation of Critical Path for Area-Time Efficient Multiple Constant Multiplications

Lou, Xin, Yu, Ya jun, Meher, Pramod

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2016

Language:

english

File:

PDF, 1.25 MB

english, 2016

30

Threshold-Guided Design and Optimization for Harris Corner Detector Architecture

Jasani, Bhavan A., Lam, Siew-Kei, Meher, Pramod Kumar, Wu, Meiqing

Journal:

IEEE Transactions on Circuits and Systems for Video Technology

Year:

2017

Language:

english

File:

PDF, 548 KB

english, 2017

31

Area-Delay-Energy Efficient VLSI Architecture for Scalable In-Place Computation of FFT on Real Data

Mohanty, Basant K., Meher, Pramod Kumar

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2018

Language:

english

File:

PDF, 2.88 MB

english, 2018

32

[IEEE 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Sapporo, Japan (2019.5.26-2019.5.29)] 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Analysis and Design of Approximate Inner-Product Architectures Based on Distributed Arithmetic

Ray, Dwaipayan, George, Nithin V., Meher, Pramod Kumar

Year:

2019

Language:

english

File:

PDF, 4.55 MB

english, 2019

33

[IEEE 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS) - Rourkela, India (2019.12.16-2019.12.18)] 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS) - Low Latency Scaling-Free Pipeline CORDIC Architecture Using Augmented Taylor Series

Wadkar, Sumit Satyavijay, Das, Bishnu Prasad, Meher, Pramod Kumar

Year:

2019

File:

PDF, 1.27 MB

2019

34

Efficient bit-parallel multipliers over finite fields GF(2m)

Chiou-Yng Lee, Pramod Kumar Meher

Journal:

Computers & Electrical Engineering

Year:

2010

Language:

english

File:

PDF, 506 KB

english, 2010

35

Nonlinear channel equalization for wireless communication systems using Legendre neural networks

Jagdish C. Patra, Pramod K. Meher, Goutam Chakraborty

Journal:

Signal Processing

Year:

2009

Language:

english

File:

PDF, 620 KB

english, 2009

36

Guest Editorial: Special Issue on Embedded Signal Processing Circuits and Systems for Cognitive Radio-Based Wireless Communication Devices

A. P. Vinod, Edmund M.-K. Lai, Pramod Kumar Meher, Jacques Palicot, Shahriar Mirabbasi

Journal:

Circuits, Systems, and Signal Processing

Year:

2011

Language:

english

File:

PDF, 288 KB

english, 2011

37

Efficient Systolic Designs for 1- and 2-Dimensional DFT of General Transform-Lengths for High-Speed Wireless Communication Applications

Pramod K. Meher, Jagdish C. Patra, A. P. Vinod

Journal:

Journal of Signal Processing Systems

Year:

2010

Language:

english

File:

PDF, 816 KB

english, 2010

38

FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic

Meher, Pramod Kumar, Chandrasekaran, Shrutisagar, Amira, Abbes

Journal:

IEEE Transactions on Signal Processing

Year:

2008

Language:

english

File:

PDF, 807 KB

english, 2008

39

A High-Performance Energy-Efficient Architecture for FIR Adaptive Filter Based on New Distributed Arithmetic Formulation of Block LMS Algorithm

Mohanty, Basant K., Meher, Pramod Kumar

Journal:

IEEE Transactions on Signal Processing

Year:

2013

Language:

english

File:

PDF, 2.55 MB

english, 2013

40

[IEEE 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC) - Madrid, Spain (2010.09.27-2010.09.29)] 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip - Novel input coding technique for high-precision LUT-based multiplication for DSP applications

Meher, Pramod Kumar

Year:

2010

Language:

english

File:

PDF, 311 KB

english, 2010

41

Memory-Efficient High-Speed Convolution-Based Generic Structure for Multilevel 2-D DWT

Mohanty, Basant Kumar, Meher, Pramod Kumar

Journal:

IEEE Transactions on Circuits and Systems for Video Technology

Year:

2013

Language:

english

File:

PDF, 6.10 MB

english, 2013

42

CORDIC Designs for Fixed Angle of Rotation

Meher, Pramod Kumar, Park, Sang Yoon

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 2.51 MB

english, 2013

43

Scale-Free Hyperbolic CORDIC Processor and Its Application to Waveform Generation

Aggarwal, Supriya, Meher, Pramod Kumar, Khare, Kavita

Journal:

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications

Year:

2013

Language:

english

File:

PDF, 2.20 MB

english, 2013

44

Low-Power, High-Throughput, and Low-Area Adaptive FIR Filter Based on Distributed Arithmetic

Park, Sang Yoon, Meher, Pramod Kumar

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2013

Language:

english

File:

PDF, 740 KB

english, 2013

45

Zero-quantised discrete cosine transform coefficients prediction technique for intra-frame video encoding

Alfalou, Ayman, Jridi, Maher, Kumar Meher, Pramod

Journal:

IET Image Processing

Year:

2013

Language:

english

File:

PDF, 572 KB

english, 2013

46

[IEEE 2007 International Conference on Intelligent and Advanced Systems (ICIAS) - Kuala Lumpur (2007.11.25-2007.11.28)] 2007 International Conference on Intelligent and Advanced Systems - Bit-serial systolic architecture for 2-D non-separable discrete wavelet transform

Mohanty, Basant Kumar, Meher, Pramod Kumar

Year:

2007

Language:

english

File:

PDF, 302 KB

english, 2007

47

[IEEE 2006 10th IEEE Singapore International Conference on Communication Systems - Singapore (2006.10.30-2006.11.1)] 2006 10th IEEE Singapore International Conference on Communication Systems - Bi-Layer Systolic Architecture for Bit-Serial Implementation of Discrete Wavelet Transform

Mohanty, Basant, Meher, Pramod

Year:

2006

Language:

english

File:

PDF, 113 KB

english, 2006

48

Memory Efficient Modular VLSI Architecture for Highthroughput and Low-Latency Implementation of Multilevel Lifting 2-D DWT

Mohanty, Basant K., Meher, Pramod Kumar

Journal:

IEEE Transactions on Signal Processing

Year:

2011

Language:

english

File:

PDF, 814 KB

english, 2011

49

[IEEE 2008 International Conference on Application-Specific Systems, Architectures and Processors (ASAP) - Leuven, Belgium (2008.07.2-2008.07.4)] 2008 International Conference on Application-Specific Systems, Architectures and Processors - Concurrent systolic architecture for high-throughput implementation of 3-dimensional discrete wavelet transform

Mohanty, Basant K., Meher, Pramod K.

Year:

2008

Language:

english

File:

PDF, 314 KB

english, 2008

50

An Efficient Look-up Table-based Approach for Multiplication over GF(2m) Generated by Trinomials

Bimal K. Meher, Pramod K. Meher

Journal:

Circuits, Systems, and Signal Processing

Year:

2013

Language:

english

File:

PDF, 582 KB

english, 2013

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